Non-volatile phase change memories (PCMs) are known, which exploit, for storing information, the characteristics of materials that have the property of switching between phases that present different electrical characteristics. For instance, the materials may switch between an amorphous phase, which is disorderly and a crystalline or polycrystalline phase, which is orderly and the two phases are associated to resistivities of a considerably different value and consequently to a different value of a datum stored. For instance, the elements of Group VI of the periodic table, such as tellurium (Te), selenium (Se), or antimony (Sb), called chalcogenides or chalcogenic materials, may advantageously be used for producing phase change memory cells.
Phase changes are obtained by locally increasing the temperature of the cells of chalcogenic material, through resistive electrodes (generally known as heaters) arranged in contact with respective regions of chalcogenic material. Selection devices (for example, MOSFETs), are connected to the heaters and enable passage of an electric programming current through a respective heater. The electric current, by the Joule effect, generates the temperatures necessary for phase change. During reading, the state of the chalcogenic material is detected by applying a voltage sufficiently low as not to cause a sensible heating and then by reading the value of the current that flows in the cell. Given that the current is proportional to the conductivity of the chalcogenic material, it is possible to determine what state the material is in and thus trace back to the datum stored in the memory cell.
In a known way, non-volatile memories comprise an array of memory cells arranged in rows (wordlines) and columns (bitlines). Each memory cell is formed, in the case of PCMs, by a phase change memory element of and by a selection transistor, connected in series. A column decoder and a row decoder enable selection, on the basis of logic address signals received at input and more or less complex decoding schemes, of the memory cells and in particular the corresponding wordlines and bitlines, each time addressed.
The column decoder comprises a plurality of analog selection switches (formed by transistors), which receive the address signals on the respective control terminals. The selection switches are arranged according to a tree structure in hierarchical levels and their number in each hierarchical level is linked to the organization and to the size of the memory array. Once enabled, the selection switches enable the bitline selected to be brought to a defined value of voltage and/or current, according to the operations that are to be implemented. In particular, a current path is created between a programming stage or a reading stage and the bitline selected. The current path is defined by the series of a certain number of selection switches.
In a known way, sense amplifiers carry out reading of the data stored in the memory cells by comparing the current that flows in the memory cell selected (or an electrical quantity correlated thereto) with a reference current that flows in a reference cell (the so-called “double-ended reading”), or else with a reference current supplied by a reference-current generator (the so-called “single-ended reading”). Single-ended reading is typically used when verifying that programming of the cell has gone through or during testing, whereas double-ended reading is typically used during normal use of the memory, for reading the logic datum stored in the cell that is to be read.
To carry out single-ended reading, an input of the sense amplifier receives the current of the memory cell that is to be read, whereas the other input of the sense amplifier receives the reference current supplied by the reference-current generator.
In both of the modes referred to, it is expedient to guarantee, as far as possible, similar working conditions for the sense amplifier, paying particular attention to the capacitive load on the two inputs thereof. This need, however, is hard to be found in single-ended reading systems in so far as, in a per se known manner, the capacitance associated to a reference-current generator used in single-ended reading is different from the capacitance that derives from the bitlines used to carry the current signal of the cell that is to be read.
Furthermore, it may be noted that the effective value of capacitance associated to the bitlines is affected by a series of unforeseeable factors, such as the manufacturing process spread. Consequently, fluctuations may occur that do not render convenient the use of a pre-set capacitance associated to the reference-current generator.